January 23, 2019


Although the device guarantees the absence of cross-conduction, the presence of the intrinsic diodes in the POWER DMOS structure causes the generation of current spikes on the sensing terminals. Post as a guest Name. They grew with duty cycle and were also consistent between cycles. Show your probe setup. When the output switches from high to low, a current spike is generated associated with the capacitor C1.

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Limited Engineering samples available Preview: Where are the power fulo bypass capacitors? I’ll add some decoupling capacitors near the chip and grab pictures over the whole cycle tomorrow.

By using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performance.

I’ll be hooking this into a microcontroller ADC, and that -6V spike looks very unfriendly. Sign up using Facebook. Cloud Components and Modules. DMOS full bridge driver. The wirewound resistors aren’t helping either madisoundspeakerstore.

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L H-bridge output current rings in brridge to step input Ask Question. These spikes along with bad probing techniques can generate what you are seeing.

L6203 Dual Full Bridge Motor Driver Module

No commitment taken to produce Proposal: How did you measure it? Each channel half-bridge of the device is controlled by a separate logic input, while a common enable controls both channels. Home Questions Tags Users Unanswered.

ST Code of Conduct Blog. I’m guessing it doesn’t help that I’m using a breadboard and my wires aren’t the cleanest see edits.

L – DMOS Full Bridge Driver – STMicroelectronics

IoT for Smart Things. Short-circuit protection on the L, L and the L Menu Products Explore our product portfolio. BruceAbbott Oh shoot, good point. Post as a guest Name. Sign up or log in Sign up using Google. Can you show us the current waveform over a complete PWM cycle?

L Dual Full Bridge Motor Driver Module – Aptinex

When I looked at the sense resistor voltage on a scope, I noticed huge artifacts right on brdge the rising and falling edge of the PWM waveform. Sign up using Email and Password. Product is in design feasibility stage.


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No commitment taken to design or produce NRND: The DMOS output transistors can operate at supply voltages up to fulll and efficiently at high switching speeds. Distributor Name Region Stock Min.

Extracts from L data sheet: Product is under characterization. Product is in volume production only to support customers ongoing production. I suspect that it has something to do with the charge differences on the capacitor leftover from the last cycle, but that’s beyond my understanding of the L ends.

Product is in volume production 3.